A primary goal in the semiconductor industry is high device yields. Manufacturers often must perform certain process steps on substantially planar wafer surfaces to achieve this end. Where manufacturers attempt to perform these process steps on non-planar surfaces, various problems can occur, resulting in a substantial number of inoperable devices and, therefore, low yield. For example, manufacturers must form metal lines on top of a substantially planar surface to ensure continuity over steps at a reduced thermal budget.
Manufacturers frequently use a layer of oxide, such as borophosphosilicate glass ("BPSG"), to planarize the surface of wafers containing advanced dynamic random access memory ("DRAM") structures, which have large stacked capacitor heights and high device density. In one process flow, manufacturers deposit a film superjacent to high-profile device structures. The wafer is then heated to reflow the film. Finally, the wafer is made substantially planar by utilizing a conventional technique, such as chemical mechanical planarization ("CMP").
Reflow is necessary to fill in voids that are created when the film is initially deposited and to smooth the top surface of the film. For reflow to occur, the film must be heated initially to its melting point. Surface tension prevents the film from reflowing even at its melting point. Therefore, the film must be heated even further to overcome the effects of surface tension and, thus, reflow.
However, there are severe limitations on the maximum thermal budget that can be tolerated during the fabrication of state of the art integrated circuit devices. Thermal process steps can cause unwanted diffusion of dopants and destabilization of existing structures. Therefore, manufacturers must carefully restrict the times, temperatures and pressures associated with each thermal process step.
This is particularly true following the source-drain implantation in the manufacture of DRAMs. Reflow of film and activation of source-drain implants are thermal process steps that contribute significantly to the total thermal budget for fabrication of DRAM devices.
For submicron device fabrication, manufacturers are increasingly using rapid thermal processing ("RTP") steps at high temperatures to achieve shallower junctions and reduced diffusion of dopants. Even where RTP reflow steps at high temperature are employed, it is crucial to utilize films having good reflow properties. RTP steps provide process windows of short duration. Films having good reflow properties permit the manufacturer to use narrow process windows for annealing the film to eliminate the effects of moisture, aging and water absorption, which could otherwise cause void formation and segregation.
For these reasons, manufacturers seek films having enhanced reflow properties at low thermal budgets. The reflow properties of certain films at lower thermal budgets can be enhanced through the introduction of specific dopants, such as boron, phosphorous or germanium, into the material forming the film. However, these doped films often exhibit other undesirable film properties when the concentration of dopants is increased. For example, high concentrations of germanium in BPSG film make the film unstable and moisture-sensitive. Also, the germanium can diffuse into a subjacent active region, thereby unintentionally altering device performance.